The integration of GaN transistors on a silicon substrate

The integration of GaN transistors on a silicon substrate




The Society published Panasonic inverter IC, is integrated on a silicon substrate 6 by the GaN type semiconductor made of NC (NormallyOff)-type field-effect transistor (FET) devices made of. When the source drain voltage is positive voltage, this GaN field-effect transistors as the transistor, a negative voltage, then act as a diode. Therefore, the inverter circuit assembly without the use of fast recovery diode (FastRecoveryDiode), only the integration of transistors on a chip can be. In other words, became a "single-chip inverter" (Figure 3). Since the integrated transistors for the horizontal-type FET, so the wiring between transistors only on the surface of bottom plate can be, it also played a role in promoting integration.



If we consider the use of motor-driven like the situation, then the monomer components, as well as between the components necessary to ensure that a high pressure. Of these, like the case of this IC, due to component relying on the past, so there is pressure drop between components at risk. Panasonic inverter IC between the pressure in order to ensure that the components in the transistor between the injection of iron (Fe) ions to form insulating areas (Figure 4). As a result, components of the voltage between 900V obtained. The company's Institute released statistics indicate that the carbon (C) ions, and boron (B) ions to form insulation zone, compared with more thermal stability of iron ions (Figure 5). In addition, the transistor monomer pressure to ensure that reached 700V. The company said that as laid in the circuit is used to type GaN semiconductor layer and buffer layer between the silicon substrate thicker than before, and therefore achieved the voltage 700V. GaN transistor on-resistance of 2.0mΩcm2.



Inverter IC chip size of 2.5mm × 2.7mm. The integration of the transistor gate width of 25mm. Silicon substrate using 150mm (6 inch) wafers by MOCVD devices, crystalline buffer layer is generated, i-GaN layer, i -AlGaN layer as well as the gate of the p-AlGaN layer, GaN type semiconductor layer, and in this form transistor. Thesis, said multi-layer structure through the use of a buffer layer, has been free from cracks (Crack) GaN-type semiconductor layer.

The result was the development of the Japanese New Energy and Industrial Technology Development Organization (NEDO) of the joint research project in progress.



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